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MC100EP451 - 3.3V / 5VECL 6-Bit Differential Register

Description

The MC10/100EP451 is a 6 bit fully differential register with common clock and single

ended Master Reset (MR).

It is ideal for very high frequency applications where a registered data path is necessary.

All inputs have a 75 kW pulldown resistor internally.

Features

  • 450 ps Typical Propagation Delay.
  • Maximu.

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Datasheet Details

Part number MC100EP451
Manufacturer onsemi
File Size 108.09 KB
Description 3.3V / 5VECL 6-Bit Differential Register
Datasheet download datasheet MC100EP451 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC10EP451, MC100EP451 3.3V / 5V ECL 6-Bit Differential Register with Master Reset Description The MC10/100EP451 is a 6−bit fully differential register with common clock and single−ended Master Reset (MR). It is ideal for very high frequency applications where a registered data path is necessary. All inputs have a 75 kW pulldown resistor internally. Differential inputs have an override clamp. Unused differential register inputs can be left open and will default LOW. When the differential inputs are forced to < VEE + 1.2 V, the clamp will override and force the output to a default state. When in the default state, and since the flip−flop is edge triggered, the output reaches a determined, but not predicted, valid state. The positive transition of CLK (pin 4) will latch the registers.
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