Description
fanout buffer designed with clock distribution in mind.
Features
- two fanout buffers, a 1:4 and a 1:5 buffer, on a single chip. The device features fully differential clock paths to minimize both device and system skew. The dual buffer allows for the fanout of two signals through a single chip, thus reducing the skew between the two fundamental signals from a part.
- to.
- part skew down to an output.
- to.
- output skew. This capability reduces the skew by a factor of 4 as compared to using two LVE111’s to accomplish the same task. To ensu.
MC100LVE210 Datasheet
