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MC10E167 - 6-BIT 2:1 MUX-REGISTER

General Description

flip-flops with single-ended outputs.

Input data are selected by the Select control, SEL.

The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both).

Key Features

  • 1000 MHz Min. Operating Frequency.
  • 800 ps Max. Clock to Output.
  • Single-Ended Outputs.
  • Asynchronous Master Resets.
  • Dual Clocks.
  • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V.
  • NECL Mode Operating Range: VCC = 0 V with VEE =.
  • 4.2 V to.
  • 5.7 V.
  • Internal Input 50 kW Pulldown Resistors.
  • ESD Protection:.
  • > 2 kV Human Body Model.
  • > 200 V Machine Model.
  • > 2 kV Charg.

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Datasheet Details

Part number MC10E167
Manufacturer onsemi
File Size 141.22 KB
Description 6-BIT 2:1 MUX-REGISTER
Datasheet download datasheet MC10E167 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC10E167 5 V ECL 6‐Bit 2:1 MUX‐Register Description The MC10E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on the Master Reset (MR) pin asynchronously forces all Q outputs LOW. The 100 Series contains temperature compensation. Features • 1000 MHz Min. Operating Frequency • 800 ps Max. Clock to Output • Single-Ended Outputs • Asynchronous Master Resets • Dual Clocks • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.