MC74ACT00 - Quad 2-Input NAND Gate

onsemi

Download the MC74ACT00 datasheet PDF. This datasheet also covers the MC74AC00 variant, as both devices belong to the same quad 2-input nand gate family and are provided as variant models within a single manufacturer datasheet.

Key Features

Output Drive Capability: $24 mA.
Operating Voltage Range: 2 to 6 V AC00; 4.5 to 5.5 ACT00.
Low Input Current: 1.0 mA.
High Noise Immunity Characteristic of CMOS Devices.
In Compliance With the JEDEC Standard No. 7A Requirements.
Chip Complexity: 32 FETs.
These are Pb.
Free Devices 1 A1 2 B1 3 Y1 4 A2 5 B2 9 A3 10 B3 6 Y2 Y = AB 8 Y3 12 A4 13 B4 11 Y4 PIN 14 = VCC PIN 7 = GND Figure 1. Logic Diagram VCC B4 A4 Y4 B3 A3.

📥 Download Datasheet

MC74ACT00 quad 2-input nand gate by onsemi - Datasheet Preview — Note: The manufacturer provides a single datasheet file (MC74AC00_ONSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number	MC74ACT00
Manufacturer	onsemi
File Size	271.27 KB
Description	Quad 2-Input NAND Gate
Datasheet	MC74ACT00 Datasheet

📁 Similar Datasheet

Part Number	Description	Manufacturer
MC74ACT05	HEX INVERTER	Motorola
MC74ACT08	Quad 2-Input AND Gate	Motorola
MC74ACT10	TRIPLE 3-INPUT NAND GATE	Motorola
MC74ACT139	DUAL 1-OF-4 DECODER/DEMULTIPLEXER	Motorola
MC74ACT153	Dual 4-Input Multiplexer	Motorola

Other Datasheets by onsemi

Part Number	Description
MC74ACT02	Quad 2-Input NOR Gate
MC74ACT04	Hex Inverter
MC74ACT05	Hex Inverter
MC74ACT08	Quad 2-Input AND Gate
MC74ACT10	Triple 3-Input NAND Gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text

Quad 2-Input NAND Gate High-Performance Silicon-Gate CMOS MC74AC00, MC74ACT00 Features • Output Drive Capability: $24 mA • Operating Voltage Range: 2 to 6 V AC00; 4.5 to 5.5 ACT00 • Low Input Current: 1.0 mA • High Noise Immunity Characteristic of CMOS Devices • In Compliance With the JEDEC Standard No. 7A Requirements • Chip Complexity: 32 FETs • These are Pb−Free Devices 1 A1 2 B1 3 Y1 4 A2 5 B2 9 A3 10 B3 6 Y2 Y = AB 8 Y3 12 A4 13 B4 11 Y4 PIN 14 = VCC PIN 7 = GND Figure 1. Logic Diagram VCC B4 A4 Y4 B3 A3 Y3 14 13 12 11 10 9 8 DATA SHEET www.onsemi.