MC74HC574A
Features
- Output Drive Capability: 15 LSTTL Loads
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating Voltage Range: 2.0 to 6.0 V (HC), 4.5 to 5.5 V (HCT)
- Low Input Current: 1.0 m A
- In pliance with the Requirements Defined by JEDEC Standard
No. 7 A
- Chip plexity: 286 FETs or 71.5 Equivalent Gates
- - Q Suffix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC- Q100 Qualified and PPAP Capable
- These Devices are Pb- Free and are Ro HS pliant
DATA INPUTS
D0 2 D1 3 D2 4 D3 5 D4 6 D5 7 D6 8
D7 9
CLOCK 11
OUTPUT ENABLE 1
19 Q0 18 Q1 17 Q2 16 Q3 15 Q4 14 Q5 13 Q6
12 Q7
NONINVERTING OUTPUTS
PIN 20 = VCC PIN 10 = GND
Figure 1. Logic Diagram
SOIC- 20 DW SUFFIX CASE 751D
TSSOP- 20 DT SUFFIX CASE 948E
PIN ASSIGNMENT
OUTPUT ENABLE 1
D0 2 D1 3 D2 4 D3 5 D4 6
D5 7 D6 8 D7 9
GND 10
19 Q0
18 Q1 17 Q2
16 Q3 15 Q4
14 Q5 13 Q6
12 Q7
11 CLOCK
MARKING DIAGRAMS
20 XXXXXXX
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