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MC74VHC1GT50 - Buffer

Key Features

  • Designed for 2.0 V to 5.5 V VCC Operation.
  • 3.5 ns tPD at 5 V (typ).
  • Inputs/Outputs Over.
  • Voltage Tolerant up to 5.5 V.
  • IOFF Supports Partial Power Down Protection.
  • Source/Sink 8 mA at 3.0 V.
  • Available in SC.
  • 88A, SC.
  • 74A, TSOP.
  • 5, SOT.
  • 553, SOT.
  • 953 and UDFN6 Packages.
  • Chip Complexity < 100 FETs.
  • NLV Prefix for Automotive and Other.

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📁 Similar Datasheet

Part Number Description Manufacturer
MC74VHC1GT50 Noninverting Buffer / CMOS Logic Level Shifter ETL
MC74VHC1GT00 2-Input NAND Gate / CMOS Logic Level Shifter ETL
MC74VHC1GT02 2-Input NOR Gate / CMOS Logic Level Shifter ETL
MC74VHC1GT04 Inverting Buffer / CMOS Logic Level Shifter ETL
MC74VHC1GT14 Schmitt-Trigger Inverter/ CMOS Logic Level Shifter ETL

Other Datasheets by onsemi

Part Number Description
MC74VHC1GT00 Single 2-Input NAND Gate
MC74VHC1GT01 2-Input NAND Gate
MC74VHC1GT02 Single 2-Input NOR Gate
MC74VHC1GT03 2-Input NOR Gate
MC74VHC1GT04 Single Inverter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Buffer MC74VHC1G50, MC74VHC1GT50 The MC74VHC1G50 / MC74VHC1GT50 is an advanced high speed CMOS buffer in tiny footprint packages. The MC74VHC1G50 has CMOS level input thresholds while the MC74VHC1GT50 has TTL level input thresholds. The input structures provide protection when voltages up to 5.5 V are applied, regardless of the supply voltage. This allows the device to be used to interface 5 V circuits to 3 V circuits. Some output structures also provide protection when VCC = 0 V and when the output voltage exceeds VCC. These input and output structures help prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc. Features • Designed for 2.0 V to 5.5 V VCC Operation • 3.