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MC74VHCT138A - 3-to-8 Line Decoder

Key Features

  • High Speed: tPD = 7.6 ns (Typ) at VCC = 5.0 V.
  • Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C.
  • TTL.
  • Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V.
  • Power Down Protection Provided on Inputs and Outputs.
  • Balanced Propagation Delays.
  • Designed for 4.5 V to 5.5 V Operating Range.
  • Pin and Function Compatible with Other Standard Logic Families.
  • Latchup Performance Exceeds 300 mA.
  • ESD Performance: Human Body Mode.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC74VHCT138A 3-to-8 Line Decoder The MC74VHCT138A is an advanced high speed CMOS 3−to−8 decoder fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. When the device is enabled, three Binary Select inputs (A0 − A2) determine which one of the outputs (Y0 − Y7) will go Low. When enable input E3 is held Low or either E2 or E1 is held High, decoding function is inhibited and all outputs go high. E3, E2, and E1 inputs are provided to ease cascade connection and for use as an address decoder for memory systems. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V, because they have full 5.