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MC74VHCT573A - Octal D-Type Latch

Key Features

  • High Speed: tPD = 4.5 ns (Typ) at VCC = 5.0 V (VHC) tPD = 7.7 ns (Typ) at VCC = 5.0 V (VHCT).
  • Low Power Dissipation: ICC = 4.0 mA (Max) at TA = 25C.
  • High Noise Immunity: VNIH = VNIL = 28%.
  • Power Down Protection Provided.
  • Balanced Propagation Delays.
  • Designed for: 2.0 V to 5.5 V (VHC) 4.5 V to 5.5 V (VHCT).
  • Low Noise: VOLP = 1.2 V (Max) (VHC) VOLP = 1.6 V (Max) (VHCT).
  • Pin and Function Compatible with Other Standard Logic Families.
  • Latchup Perfo.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Octal D-Type Latch with 3-State Output MC74VHC573, MC74VHCT573A The MC74VHC573/MC74VHCT573A is an advanced high speed CMOS octal latch with 3−state output fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The 8−bit D−type latch is controlled by a latch enable input and an output enable input. When the output enable input is high, the eight outputs are in a high impedance state. The MC74VHC573 inputs are compatible with standard CMOS levels while the MC74VHCT573A inputs are compatible with TTL levels. The MC74VHCT573A device can be used as a level converter for interfacing 3.3 V to 5.0 V, because it has full 5.0 V CMOS level output swings.