Overview: NB3H60113G 3.3 V / 2.5 V Programmable OmniClock Generator
with Single Ended (LVCMOS/LVTTL) and Differential (LVPECL/LVDS/ HCSL/CML) Outputs .onsemi. The NB3H60113G, which is a member of the OmniClock family, is a one−time programmable (OTP), low power PLL−based clock generator that supports any output frequency from 8 kHz to 200 MHz. The device accepts fundamental mode parallel resonant crystal or a single ended (LVCMOS/LVTTL) reference clock as input. It WDFN8 CASE 511AT generates either three single ended (LVCMOS/LVTTL) outputs, or one single ended output and one differential MARKING DIAGRAM (LVPECL/LVDS/HCSL/CML) output. The output signals can be modulated using the spread spectrum feature of the PLL (programmable spread spectrum type, deviation and rate) for applications demanding low electromagnetic interference (EMI). Using the PLL bypass mode, it is possible to get a copy of the input clock on any or all of the outputs. The device can be powered down using the Power Down pin (PD#). It is possible to program the internal input crystal load capacitance and the output drive current provided by 1 H0MG G
H0 = Specific Device Code M = Date Code G = Pb−Free Device
(Note: Microdot may be in either location) the device. The device also has automatic gain control (crystal power limiting) circuitry which avoids the device overdriving the external ORDERING INFORMATION crystal. See detailed ordering and shipping information on page 21 of this data sheet.
