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NB7L1008 - 2.5V / 3.3V 1:8 LVPECL Fanout Buffer

General Description

fanout buffer.

The NB7L1008 produces eight identical output copies of Clock or Data operating up to 7 GHz or 12 Gb/s, respectively.

Key Features

  • Typical Maximum Input Data Rate > 12 Gb/s Typical.
  • Data Dependent Jitter < 15 ps.
  • Maximum Input Clock Frequency > 7 GHz Typical.
  • Random Clock Jitter < 0.8 ps RMS.
  • Low Skew 1:8 LVPECL Outputs, < 20 ps max.
  • Multi.
  • Level Inputs, accepts LVPECL, CML, LVDS.
  • 160 ps Typical Propagation Delay.
  • 50 ps Typical Rise and Fall Times.
  • Differential LVPECL Outputs, 750 mV Peak.
  • to.
  • Peak, Typical.
  • Opera.

📥 Download Datasheet

Datasheet Details

Part number NB7L1008
Manufacturer onsemi
File Size 179.81 KB
Description 2.5V / 3.3V 1:8 LVPECL Fanout Buffer
Datasheet download datasheet NB7L1008 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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NB7L1008 2.5V / 3.3V 1:8 LVPECL Fanout Buffer Multi−Level Inputs w/ Internal Termination Description The NB7L1008 is a high performance differential 1:8 Clock/Data fanout buffer. The NB7L1008 produces eight identical output copies of Clock or Data operating up to 7 GHz or 12 Gb/s, respectively. As such, the NB7L1008 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The differential inputs incorporate internal 50 W termination resistors that are accessed through the VT pin. This feature allows the NB7L1008 to accept various logic standards, such as LVPECL, CML, LVDS logic levels. The VREFAC reference output can be used to rebias capacitor−coupled differential or single−ended input signals.