NCP163 - Ultra-Low Noise and High PSRR LDO Regulator

Product Overview

ON Semiconductor

Datasheet Details

Part number	NCP163
Manufacturer	ON Semiconductor
File Size	1.37 MB
Description	Ultra-Low Noise and High PSRR LDO Regulator
Datasheet	NCP163 Datasheet
Additional preview pages of the NCP163 datasheet.

Product details

Description

Pin No. 5L XDFN4 A1 1 4 A2 5 1 B1 3 3 B2 2 2 4 EPAD Pin Name IN OUT EN GND NC EPAD Description Input voltage supply pin Regulated output voltage.The output should be bypassed with small 1 mF ceramic capacitor.Chip enable: Applying VEN < 0.4 V disables the regulator, Pulling VEN > 1.2 V enables the LDO.Common ground connection Not connected.Can be tied to ground plane.Exposed pad.Can be tied

Features

Operating Input Voltage Range: 2.2 V to 5.5 V.
Available in Fixed Voltage Option: 1.2 V to 5.3 V.
±2% Accuracy Over Load/Temperature.
Ultra Low Quiescent Current Typ. 12 mA.
Standby Current: Typ. 0.1 mA.
Very Low Dropout: 80 mV at 250 mA.
Ultra High PSRR: Typ. 92 dB at 20 mA, f = 1 kHz.
Ultra Low Noise: 6.5 mVRMS.
Stable with a 1 mF Small Case Size Ceramic Capacitors.
Available in.
WLCSP4: 0.64 mm.

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Published: Nov 11, 2016 |