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NLV74VHC1GT132 - 2-Input NAND Schmitt-Trigger

Download the NLV74VHC1GT132 datasheet PDF. This datasheet also covers the NLV74VHC1G132 variant, as both devices belong to the same 2-input nand schmitt-trigger family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Designed for 2.0 V to 5.5 V VCC Operation.
  • 3.6 ns tPD at 5 V (typ).
  • Inputs/Outputs Over.
  • Voltage Tolerant up to 5.5 V.
  • IOFF Supports Partial Power Down Protection.
  • Source/Sink 8 mA at 3.0 V.
  • Available in SC.
  • 88A and TSOP.
  • 5 Packages.
  • Chip Complexity < 100 FETs.
  • NLV Prefix for Automotive and Other.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (NLV74VHC1G132-ONSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription for NLV74VHC1GT132 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for NLV74VHC1GT132. For precise diagrams, and layout, please refer to the original PDF.

2-Input NAND Schmitt-Trigger NLV74VHC1G132, NLV74VHC1GT132 The NLV74VHC1G132 / NLV74VHC1GT132 is a single 2−input NAND Schmitt Trigger in tiny footprint packages. The NLV...

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ingle 2−input NAND Schmitt Trigger in tiny footprint packages. The NLV74VHC1G132 has CMOS−level input thresholds while the NLV74VHC1GT132 has TTL−level input thresholds. The input structures provide protection when voltages up to 5.5 V are applied, regardless of the supply voltage. This allows the device to be used to interface 5 V circuits to 3 V circuits. Some output structures also provide protection when VCC = 0 V and when the output voltage exceeds VCC. These input and output structures help prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc. Feature