Datasheet Details
| Part number | P3P85R01A |
|---|---|
| Manufacturer | onsemi |
| File Size | 135.57 KB |
| Description | 75 MHz to 200 MHz LVCMOS TIMING SAFE Peak EMI Reduction Device |
| Datasheet |
 P3P85R01A Datasheet
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General Description
TIMING SAFE Peak EMI reduction device.
TIMING SAFE technology is the ability to modulate a clock source with Spread Spectrum technology and maintain synchronization with any associated data path.
Refer to Figure 3.
Key Features
- 1x, LVCMOS Peak EMI Reduction.
- Input Frequency Range: 75 MHz.
- 200 MHz.
- Output Frequency Range: 75 MHz.
- 200 MHz.
- Analog Deviation Selection.
- Analog Input.
- Output Delay Control.
- Analog PLL Output Delay Control.
- Low Cycle.
- to.
- Cycle Jitter.
- Supply Voltage: 3.3 V ± 0.3 V.
- 8 pin, WDFN, 2 mm x 2 mm (TDFN) Package.
- Operating Temperature Range: 0°C to +70°C.
- These De.