Description
configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device.
Features
- On-resistance RDS(on): 410 mW (Typ).
- Operating Temperature: 175 °C (Max).
- Excellent Reverse Recovery: Qrr = 70 nC.
- Low Body Diode VFSD: 1.5 V.
- Low Gate Charge: QG = 23.1 nC.
- Low Intrinsic Capacitance.
- ESD Protected: HBM Class 2 and CDM Class C3.
- This Device is Halogen Free and RoHS Compliant with Exemption
7a, Pb-Free 2LI (on second level interconnection)
Typical.