74FST3383 Datasheet | onsemi

Features http://onsemi. MARKING DIAGRAMS 24 24 1 SOIC- 24 DW SUFFIX CASE 751E 1 FST3383 AWLYWW - - - - - - - - RON t 4 W Typical Less Than 0.25 ns- Max Delay Through Switch Nearly Zero Standby Current No Circuit Bounce Control Inputs are TTL/CMOS patible Pin- For- Pin patible With QS3383, FST3383, CBT3383 All Popular Packages: SOIC- 24, TSSOP- 24, QSOP- 24 All Devices in Package TSSOP are Inherently Pb- Free- 24 FST 3383 ALYW 1 OE C0 A0 B0 D0 C1 A1 B1 D1 C2 A2 GND 1 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC D4 B4 A4 C4 D3 B3 A3 C3 D2 B2 BX TSSOP- 24 DT SUFFIX CASE 948H 24 24 1 QSOP- 24 QS SUFFIX CASE 492B FST3383 AWLYYWW 1 Figure 1. 24- Lead Pinout A L, WL Y, YY W, WW = = = = Assembly Location Wafer Lot Year Work Week TRUTH TABLE OE H L L BX X L H A0- A4 HIGH- Z State C0- C4 D0- D4 B0- B4 HIGH- Z State D0- D4 C0- C4 Function Disconnect Connect Exchange PIN NAMES Pin OE BX A0- A4, B0- B4 C0- C4, D0- D4 Description Bus Switch Enable Bus Exchange Buses A, B Buses C, D NOTE: H = HIGH Voltage Level, L = LOW Voltage Level, X = Don’t Care ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. - For additional information on our Pb- Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor ponents Industries, LLC, 2005 January, 2005 - Rev. 5 Publication Order Number: 74FST3383/D A0 C0 B0 D0 A4 C4 B4 D4 BX OE Figure 2. Logic Diagram ORDERING INFORMATION mber Device Order N Number 74FST3383DW 74FST3383DWR2 74FST3383DT 74FST3383DTR2 74FST3383QS 74FST3383QSR Package SOIC- 24 SOIC- 24 TSSOP- 24- (Pb- Free) TSSOP- 24- (Pb- Free) QSOP- 24 QSOP- 24 Shipping† 48 Units / Rail 2500 Units / Tape & Reel 96 Units / Rail 2500 Units / Tape & Reel 96 Units / Rail 2500 Units / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please...