SB3N551 Description
The SB3N551 is a low skew 1−to−4 clock fanout buffer, designed for clock distribution in mind. The SB3N551 specifically guarantees low output−to−output skew. Optimal design, layout and processing minimize skew within a device and from device to device.
SB3N551 Key Features
- Input/Output Clock Frequency up to 160 MHz
- Low Skew Outputs (50 ps typical)
- RMS Phase Jitter (12 kHz
- 20 MHz): 43 fs (Typical)
- Output goes to Three-State Mode via OE
- Operating Range: VDD = 3.0 V to 5.5 V
- Ideal for Networking Clocks
- Packaged in 8-pin SOIC
- Industrial Temperature Range
- These are Pb-Free Devices