GENERAL DESCRIPTION
These chips not designed for resistance to light or Resistance High-speed 8-bit MPU interface (capability to be connected microprocessor bus. l It generates a liquid crystal drive signal independent of the microprocessor. The SPLC501C contains e ly 65 common output circuits, 132 segment output circuits and therefore, a single chip can drive a 65 X 132 dot display (capable fid n of displaying 8 columns X 4 rows of a 16 X 16 dot kanji font). The O chips can save a great amount of power because no external operating clock is required for the display data RAM to read and n write operations. Since each chip is equipped internally with a o e low-power liquid crystal driver power supply, resistors for liquid s crystal driver power voltage adjustment and a display clock CR C oscillator circuit, the SPLC501C can be used for creating the U lowest power display system with the fewest components for high h r performance portable devices. ec Fo 2.FEATURES
T - Direct display of RAM data through the display data RAM. y ‘1’: Non-illuminated.
ORISE
