GENERAL DESCRIPTION
Since the SPLC502B contains a 65 X 132 bits of display data RAM, a 1-to-1 correspondence between the liquid crystal panel pixels and the internal RAM bits, it is able to enable displays with a high degree of flexibility. The SPLC502B contains 65 common output circuits, 132 segment output circuits and therefore, a single chip can drive a 65 X 132 dot display (capable of displaying 8 columns X 4 rows of a 16 X 16 dot kanji font). In addition, the capacity of the display can also be extended through the use of master/slave structures between chips. The chips can save a great amount of power because no external operating clock is required for the display data RAM to read and write operations. Since each chip is equipped internally with a low-power liquid crystal driver power supply, resistors for liquid crystal driver power voltage adjustment and a display clock CR oscillator circuit, the SPLC502B can be used for creating the lowest power display system with the fewest components for high performance portable devices.
ORISE
