GENERAL DESCRIPTION
PWM switching frequency at normal operation is externally programmable and trimmed to tight range. At no load or light load condition, the IC operates in extended ‘burst mode’ to minimize switching loss. Lower standby power and higher conversion efficiency is thus achieved. VDD low startup current and low operating current contribute to a reliable power on startup design with OB2268C. A large value resistor could thus be used in the startup circuit to minimize the standby power. The internal slope compensation improves system large signal stability and reduces the possible subharmonic oscillation at high PWM duty cycle output. Leading-edge blanking on current sense input removes the signal glitch due to snubber circuit diode reverse recovery. This greatly helps to reduce the external component count and system cost in application. The Gate-drive output is clamped l at 18V to protect the power MOSFET. a In OB2268C, OCP threshold slope is internally i optimized to rea...
On-Bright
