Opti 82C283
The 82C283 is a highly integrated, AT system logic VLSI chip for high-end 386SX/AT systems. It integrates a local memory controller (local memory is on-board memory), AT bus controller, and data bus controller into one chip. It is designed for systems running at 16MHz, 20MHz, 25MHz, and 33MHz*.| Part No. | 82C283 |
|---|---|
| Datasheet | 82C283 Download |
| Manufacturer | Opti |
| Description | 386SX System Controller |
| Buy | Stock & Price |
FEATURES
2.0 Overview● Flexible DRAM banks configuration - Supports 256K, 1M and 4M DRAM
● Block interleave mode operations - Block interleaving at a block size of 512 bytes
● BIOS shadow RAM - Shadow RAM for system, video and adapter BIOS
● Memory remapping
● Flexible multiplexed DRAM address
● Programmable AT bus clock
● Turbo switch
● 160-pin PQFP (Plastic Quad Flat Pack) A high performance, compact 386SX/AT system is readily implemented with the 82C283 and a standard peripheral controller like OPTi’s 82C206 or the 82C100 (with Dallas Semiconductor (DS1287). *Rev. B only Figure 2-1 System Block Diagram A Bus D Bus DRAM RAS, CAS, MA SA Bus SD Bus A[23:0] 386SX D[15:0] OPTi 82C283 SD[15:0] SA[19:17] SD 245 XD[7:0] D[15:0] 387SX A[16:1] XA0 245 (x2) SA[16:0] SA ROM GA20 A[23:17] 245 LA[23:17] A[9:1] A[23:16] OPTi 82C206 XD[7:0] 8042 September 1994 OPTi Inc.
● 2525 Walsh Avenue
● Santa Clara, CA 95051
● (408) 980-8178 82C283 3.0 Signal Definitions Pin Diagram Figure 3-1 120 119 118 117...
