PMF512808F
description and subject to change without notice.
πPM Tech
Features
PMF512808F/PMF512816F/PMF412808F/PMF412816F
4GBIT DDRIII DRAM
- Basis DDR3 pliant
- Signal Integrity
- 8n Prefetch Architecture
- Differential Clock(CK, /CK) and Data trobe(DQS, /DQS)
- Double-data rate on DQs, DQS, DM
- Configurable DS for system patibility
- Configurable On-Die Termination
- ZQ Calibration for DS/ODT impedance accuracy via external ZQ pad (240 ohm ± 1%)
- Data Integrity
- Auto Self Refresh (ASR) by DRAM built-in TS
- Auto Refresh and Self Refresh Modes
- Signal Synchronization
- Write Leveling via MR settings 5
- Read Leveling via MPR
- Power Saving Mode
- Interface and Power Supply
- Power Down Mode
Options
- SSTL_15 for DDR3:VDD/VDDQ=1.5V(±0.075V)
- SSTL_1352 for DDR3L:VDD/VDDQ=1.35V (0.067/+0.1V)
- Speed Grade ( Data Rate/CL-t RCD-t RP) 1
- 2133 Mbps / 14-14-14
- 1866 Mbps / 13-13-13
- 1600 Mbps / 11-11-11
- Temperature Range (Tc) 3
- mercial Grade = 0℃ to + 95℃
- Industrial Grade =...
