FEATURES
z Clock frequency: 166, 133 MHz z Fully synchronous; all signals referenced to a positive clock edge z Four banks operation z Single 3.3V power supply z LVTTL interface z Programmable burst length 1, 2, 4, 8, full page z Programmable burst sequence: Sequential/Interleave z 8192 refresh cycles /64ms z Random column address every clock cycle z Programmable /CAS latency (2, 3 clocks) z Burst read/write and burst read/single write operations capability z Burst termination by burst stop and precharge command z Byte controlled by LDQM and UDQM GENERAL DESCRIPTION
