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P4C1257L - STATIC CMOS RAM

Download the P4C1257L datasheet PDF. This datasheet also covers the P4C1257 variant, as both devices belong to the same static cmos ram family and are provided as variant models within a single manufacturer datasheet.

General Description

The P4C1257/P4C1257L are 256Kx1-bit ultra high-speed static RAMs.

The CMOS memories require no clocks or refreshing and have equal access and cycle times.

The RAMs operate from a single 5V ± 10% tolerance power supply.

Key Features

  • Full CMOS High Speed (Equal Access and Cycle Times).
  • 12/15/20/25 ns (Commercial).
  • 12/15/20/25 ns (Industrial).
  • 25/35/45/55/70 ns (Military) Single 5V±10% Power Supply Data Retention with 2.0V Power Supply (P4C1257L) P4C1257/P4C1257L ULTRA HIGH SPEED 256K x 1 STATIC CMOS RAMS Separate Data I/O Three-State Output Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved).
  • 24-Pin 300 mil DIP, SOJ.
  • 28-Pin 350x550 m.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (P4C1257-PYRAMID.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number P4C1257L
Manufacturer PYRAMID
File Size 758.15 KB
Description STATIC CMOS RAM
Datasheet download datasheet P4C1257L Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FEATURES Full CMOS High Speed (Equal Access and Cycle Times) – 12/15/20/25 ns (Commercial) – 12/15/20/25 ns (Industrial) – 25/35/45/55/70 ns (Military) Single 5V±10% Power Supply Data Retention with 2.0V Power Supply (P4C1257L) P4C1257/P4C1257L ULTRA HIGH SPEED 256K x 1 STATIC CMOS RAMS Separate Data I/O Three-State Output Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved) – 24-Pin 300 mil DIP, SOJ – 28-Pin 350x550 mil LCC – 28-Pin Flatpack DESCRIPTION The P4C1257/P4C1257L are 256Kx1-bit ultra high-speed static RAMs. The CMOS memories require no clocks or refreshing and have equal access and cycle times. The RAMs operate from a single 5V ± 10% tolerance power supply. Data integrity is maintained for supply voltages down to 2.