P4C1257L Datasheet | PYRAMID

FEATURES Full CMOS High Speed (Equal Access and Cycle Times) - 12/15/20/25 ns (mercial) - 12/15/20/25 ns (Industrial) - 25/35/45/55/70 ns (Military) Single 5V±10% Power Supply Data Retention with 2.0V Power Supply (P4C1257L) P4C1257/P4C1257L ULTRA HIGH SPEED 256K x 1 STATIC CMOS RAMS Separate Data I/O Three-State Output Fully TTL patible Inputs and Outputs Standard Pinout (JEDEC Approved) - 24-Pin 300 mil DIP, SOJ - 28-Pin 350x550 mil LCC - 28-Pin Flatpack DESCRIPTION The P4C1257/P4C1257L are 256Kx1-bit ultra high-speed static RAMs. The CMOS memories require no clocks or refreshing and have equal access and cycle times. The RAMs operate from a single 5V ± 10% tolerance power supply. Data integrity is maintained for supply voltages down to 2.0V, typically drawing 10µA. Access times as fast as 12 nanoseconds are available, greatly enhancing system speeds. The P4C1257/P4C1257L are available in 24-pin 300 mil DIP and SOJ, 28-pin LCC and Flatpack packages, providing excellent board level densities. Functional Block Diagram Pin Configuration S Document # SRAM137 REV 01 DIP (P4, C4) SOJ (J4) LCC (L5) Revised June 2013 P4C1257/P4C1257L - ULTRA HIGH SPEED 256K X 1 STATIC CMOS RAMS Maximum Ratings(1) Sym Parameter Power Supply Pin with Respect to GND Terminal Voltage with VTERM Respect to GND (up to 7.0V) TA Operating Temperature TBIAS Temperature Under Bias TSTG Storage Temperature PT Power Dissipation IOUT DC Output Current Value -0.5 to +7 -0.5 to VCC +...