FEATURES
Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) – 10/12/15/20/25 ns (Commercial) – 15/20/25/35 ns (Military) Low Power Operation – 715 mW Active –10 (Commercial) – 550 mW Active –25 (Commercial) – 110 mW Standby (TTL Input) – 55 mW Standby (CMOS Input) DESCRIPTION
Inputs are fully TTL-compatible. Access times as fast as 10 nanoseconds are available, permitting greatly enhanced system operating speeds. Single 5V ± 10% Power Supply Separate Input and Output Ports Three-State Outputs Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved) – 18 Pin 300 mil DIP – 18 Pin CERPACK – 18 Pin LCC (290 x 430 mils) – 18 Pin LCC (295 x 335 mils) CMOS is utilized t
PYRAMID
