MN101D08E Datasheet | Panasonic

.. Type Internal ROM type ROM (byte) RAM (byte) Package (Lead-free) MN101D08E Mask ROM 80K 2K MN101DF08G FLASH 128K 4K Minimum Instruction Execution Time LQFP080-P-1414A [With main clock operated] 0.1397 µs (at 4.0 V to 5.5 V, 14.32 MHz) 0.1397 µs (at 4.0 V to 5.5 V, 14.32 MHz) 71.5 µs (at 2.7 V to 5.5 V, 14.32 MHz internal 71.5 µs (at 2.7 V to 5.5 V, 14.32 MHz internal frequency di Vision) frequency di Vision) 61 µs (at 2.5 V to 5.5 V, 32.768 k Hz) [When sub-clock operated] 61 µs (at 2.5 V to 5.5 V, 32.768 k Hz) - Interrupts RESET, Runaway, External 0 to 4, Timer 0 to 3, Timer 6, Capstan FG, Control, HSW, Cylinder(Drum) FG, Servo V-sync, Synchronous output, OSD, XDS, Serial 1, Serial 2, PWM 4, OSD V-sync Timer counter 0 : 8-bit × 1 (timer function) Clock source................ 1/4, 1/16 of system clock frequency Interrupt source ........... overflow of timer counter 0 Timer counter 1 : 8-bit × 1 (timer function, linear timer counter function) Clock source................ 1/4 of system clock frequency; CTL signal Interrupt source ........... overflow of timer counter 1 Timer counter 2 : 16-bit × 1 (timer function, input capture (CTL specified edge), duty judgment of CTL signal) Clock source................ 1/4, 1/16, 1/24 of system clock frequency Interrupt source ........... overflow of timer counter 2; input of CTL specified edge; underflow of timer 2 shift register 4-bit counter; coincidence of timer 2 shift register with timer 2 shift register pare register - Timer Counter .. Timer counter 3 : 16-bit × 1 (timer function) Clock source................ 1/4, 1/16 of system clock frequency Interrupt source ........... overflow of timer counter 3 Timer counter 5 : 19-bit × 1 (watchdog, stable oscillation waiting function) Clock source................ system clock Watchdog interrupt source ... 1/216, 1/219 of timer counter 5 frequency Clear by stable oscillation ... after 256 counts by timer counter 5 (218 counts of OSC...