MN86062 - CODEC LSI for Facsimile Images

Description

Pin No.

Features

Compression methods MH, MR, and MMR Operating mode: Page mode Bus configuration: Choice of dual- or single-bus operation Decoding error processing: Choice of replacing with the previous line or a white line Image bus configuration: 8 bits, maximum 16 megabytes address space of image bus, 2-channel master DMA System bus configuration: X80 interface compatible, 8 bits, 2-channel slave DMA Pixels per line: maximum 64K, in byte increments Concurrent DMA transfers over image bus and command processin.

Panasonic Semiconductor

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Datasheet Details

Part number	MN86062
Manufacturer	Panasonic Semiconductor
File Size	47.04 KB
Description	CODEC LSI for Facsimile Images
Datasheet	MN86062 Datasheet
Additional preview pages of the MN86062 datasheet.

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Full PDF Text Transcription

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For Communications Equipment MN86062 CODEC LSI for Facsimile Images Overview The MN86062 is a high-speed LSI codec for compressing and decompressing images using the MH, MR, and MMR standard compression methods specified in the ITU-T T.4 and T.6 recommendation. Registers and other settings provide flexible support for a variety of processing.

Published: Dec 27, 2005 |