PE9701
Overview
- Counter values are programmable through either a serial or parallel interface and can also be directly hard wired. The PE9701 is optimized for commercial space applications. Single Event Latch up (SEL) is physically impossible and Single Event Upset (SEU) is better than 10-9 errors per bit / day. It is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-oninsulator (SOI) technology on a sapphire substrate, offering excellent RF performance and intrinsic radiation tolerance. Figure
- Block Diagram 3000 MHz UltraCMOS™ Integer-N PLL Rad Hard for Space Applications Features
- 3.0 GHz operation
- ÷10/11 dual modulus prescaler
- Internal phase detector with charge pump
- Serial, parallel or hardwired programmable
- Ultra-low phase noise
- SEU < 10-9 errors / bit-day
- 100 Krad (Si) total dose
- 44-lead CQFJ Fin Fin Prescaler 10/11 Main Counter 13 fp D(7:0) 8 Sdata Pre_en M(6:0) A(3:0) R(3:0) fr Primary 20-bit 20 Latch Secondary 20-bit Latch 20 20 20 16 Phase Detector PD_U PD_D Charge Pump CP 6 6 fc R Counter Document No. 70-0035-02 │ ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 13 PE9701 Product Specification Figure
