PI6CEQ20200 Description
The PI6CEQ20200 is a high performance PCIe Gen2/ Gen3 zero delay buffer with two HCSL outputs. Peri’s proprietary equalization technique used in this device improves signal integrity and makes this device suitable for PCIe Gen2/ Gen3 applications even when the input from the main clock has to travel a long distance. “0” is “enabled”, “1” is “tri-stated.
PI6CEQ20200 Key Features
- Gen3 performance only available in mercial temp