Datasheet4U Logo Datasheet4U.com

PI6LC48P02 - 2-Output LVPECL Fibre Channel (FC) and Ethernet Clock Generator

Description

The PI6LC48P02 is a 2-output LVPECL synthesizer optimized to generate Fibre Channel, Ethernet and storage reference clock frequencies and is a member of Pericom’s HiFlex family of high performance clock solutions.

Features

  • ÎÎTwo differential LVPECL output pairs ÎÎSelectable crystal oscillator interface or LVCMOS/LVTTL single-ended clock input ÎÎSupports the following output frequencies: ÎÎEthernet: 50MHz, 100MHz, 150MHz, 156.25MHz, 200MHz ÎÎFibre Channel: 53.125MHz, 106.25MHz, 159.375MHz, 187.5MHz, 212.5MHz ÎÎRMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal (12kHz.
  • 20MHz): 0.28ps (typical) ÎÎRMS phase jitter @ 100MHz, using a 25MHz crystal (12kHz.
  • 20MHz): 0.32ps (typical) ÎÎRMS phase jitte.

📥 Download Datasheet

Datasheet preview – PI6LC48P02

Datasheet Details

Part number PI6LC48P02
Manufacturer Pericom Semiconductor
File Size 728.53 KB
Description 2-Output LVPECL Fibre Channel (FC) and Ethernet Clock Generator
Datasheet download datasheet PI6LC48P02 Datasheet
Additional preview pages of the PI6LC48P02 datasheet.

📁 Similar Datasheet

  • PI6008K - FHD HDR ISP (Pixelplus)
  • PI6049A - Contact Image Sensor (AMI SEMICONDUCTOR)
  • PI632BZ - MOSFET (UNIKC)
  • PI6C103 - Precision Clock Synthesizer (Pericom Semiconductor Corporation)
  • PI6C106 - Pentium/Pro System Clock Chip (Pericom Semiconductor Corporation)
  • PI6C18551 - 3.3V/5V 1 to 4 Clock Buffer (Pericom Semiconductor Corporation)
  • PI6C2405A - Zero-Delay Clock Buffer (Pericom Semiconductor Corporation)
  • PI6C2408 - 3.3V 4+4 Ouptut Zero-delay Clock Driver (Pericom Semiconductor Corporation)
  • PI6C2409 - Zero-Delay Clock Buffer (Pericom Semiconductor Corporation)
  • PI6C2502 - Phase-Locked Loop Clock Driver (Pericom Semiconductor Corporation)
Other Datasheets by Pericom Semiconductor

Full PDF Text Transcription

Click to expand full text
PI6LC48P02 2-Output LVPECL Fibre Channel (FC) and Ethernet Clock Generator Features ÎÎTwo differential LVPECL output pairs ÎÎSelectable crystal oscillator interface or LVCMOS/LVTTL single-ended clock input ÎÎSupports the following output frequencies: ÎÎEthernet: 50MHz, 100MHz, 150MHz, 156.25MHz, 200MHz ÎÎFibre Channel: 53.125MHz, 106.25MHz, 159.375MHz, 187.5MHz, 212.5MHz ÎÎRMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal (12kHz – 20MHz): 0.28ps (typical) ÎÎRMS phase jitter @ 100MHz, using a 25MHz crystal (12kHz – 20MHz): 0.32ps (typical) ÎÎRMS phase jitter @ 156.25MHz, using a 26.041667MHz crystal (12kHz – 20MHz): 0.30ps (typical) ÎÎFull 3.3V or 2.
Published: |