PL611-25 Datasheet | PhaseLink Corporation

Programmable Quick Turn Clock T M Features Advanced programmable PLL design Very low Jitter and Phase Noise (< 40ps Pk-Pk typical) Two registers banks for 2-time programming. Output frequency up to 200MHz CMOS. Crystal inputs: o Fundamental crystal: 10MHz-30MHz o 3 RD overtone crystal: Up to 75MHz - Single 2.5V or 3.3V ± 10% power supply .. - Operating temperature range from -40 ° C to 85 ° C - Available in Die form only - - - - - PAD LAYOUT AND DIE ID XIN OE GND GND CLK1 1 2 3 4 5 6 VDD 9 Die ID: C611A- 8 0505-05D 7 XOUT DNC VDD DIE AND WAFER SPECIFICATION Name Die Size Reverse side Pad Opening Wafer Diameter Die Per Wafer Wafer Thickness GND 80 micron x 80...