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PL130-00 Datasheet PDF

PhaseLink PL130-00

The PL130-00 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.3GHz. It provides selectable user outputs, between differential PECL, differential LVDS or CMOS/TTL. This chip is ideal for conversion from sine wave, TTL, CMOS, or LVDS to PECL, LVDS or CMOS.
Part No. PL130-00
Datasheet PL130-00 Download
Manufacturer
PhaseLink
Description Selectable High Speed Translator Buffer to CMOS
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PL130-00 datasheet page 1 preview

FEATURES

● User selectable output: Differential PECL, Differential LVDS or CMOS/TTL
● Single internally AC coupled input
● Accepts input signal swings as low as 100mV
● Input range from DC to 1.3 GHz.
● 3.3V operation.
● Available in DIE (65 mil x 62 mil). DESCRIPTIONS Any input signal with at least 100mV swing can be used as reference signal. BLOCK DIAGRAM REF_IN Input Amplifier OUTSEL0 OUTSEL1 Selector Logic OE_CTRL PECL_BAR PECL LVDS_BAR LVDS CMOS DIE CONFIGURATION 65 mil 25 24 23 22 21 20 19 18 26 (1550,1475) 17 16 62 mil 15 27 14 28 13 29 12 11 30 10 31 9 12345 6 78 Y (0,0)
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