PLL205-01
FEATURES
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Generates all clock frequencies for VIA K7 chip sets requiring multiple CPU clocks and high speed SDRAM buffers. Support one pair of differential CPU clocks, one open-drain CPU, 6 PCI and 13 high-speed SDRAM buffers for 3-DIMM applications. One 24_48MHz clock and one 48MHz clock. Two14.318MHz reference clocks. Power management control to stop CPU, and Power down Mode from I2C programming. Support 2-wire I2C serial bus interface with builtin Vendor ID, Device ID and Revision ID. Single byte micro-step linear Frequency Programming via I2C with Glitch free smooth switching. Spread Spectrum ± 0.25% center spread, 0 to
- 0.5% downspread. 50% duty cycle with low jitter. Available in 300 mil 48 pin SSOP.
.D at h S a t e e
4U
. m o c
Motherboard Clock Generator for AMD
- K7
PIN CONFIGURATION
VDD0 REF0//CPU_STOP#^ GND XIN XOUT VDD1 PCI5/MODE- ^ PCI0/FS3- ^ GND PCI1/SEL24_48- ^ PCI2 PCI3 PCI4 VDD2 SDRAMIN GND SDRAM11 SDRAM10 VDD3 SDRAM9 SDRAM8...
