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PLL601-02 Datasheet Low Phase Noise Pll Clock Multiplier

Manufacturer: PhaseLink

Datasheet Details

Part number PLL601-02
Manufacturer PhaseLink
File Size 75.43 KB
Description Low Phase Noise PLL Clock Multiplier
Datasheet PLL601-02_PhaseLink.pdf

General Description

S The PLL601-02 is a low cost, high performance and low phase noise clock synthesizer.

With PhaseLink’s proprietary analog and digital Phase Locked Loop techniques, the chip accepts 10-27MHz crystal or clock input, and produces outputs clocks up to 160MHz at 3.3V.

Ideal for 155.52MHz applications.

Key Features

  • w.
  • w w Full swing CMOS outputs with 25 mA drive capability at TTL levels. Reference 10-27MHz crystal or clock. Integrated crystal load capacitor: no external load capacitor required. Output clocks up to 160MHz at 3.3V. Low phase noise (-126dBc/Hz @ 1kHz). Output Enable function. Low jitter (RMS): 6.4ps (period), 9.4ps (accum. ) Advanced low power sub-micron CMOS process. 3.3V operation. Availab.

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