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PLL601-15 Datasheet Low Phase Noise Pll Clock Multiplier

Manufacturer: PhaseLink

Overview: m o .c U 4 t e.

Datasheet Details

Part number PLL601-15
Manufacturer PhaseLink
File Size 102.81 KB
Description Low Phase Noise PLL Clock Multiplier
Datasheet PLL601-15_PhaseLink.pdf

General Description

S The PLL601-15 is a low cost, high performance and low phase noise clock synthesizer.

It implements PhaseLink’s proprietary analog and digital Phase Locked Loop techniques for a fixed 5x multiplier.

The chip accepts crystal or clock inputs ranging from 20 to 30MHz, and produces outputs clocks up to 150MHz at 3.3V.

Key Features

  • e h.
  • Full swing CMOS S outputs with 25 mA drive capability a at TTL levels. t 20-30MHz crystal or clock.
  • Reference a.
  • Integrated crystal load capacitor: no external . D load capacitor required. w.
  • Output clocks up to 150MHz at 3.3V. w.
  • Low phase noise (-126dBc/Hz @ 1kHz). w.
  • Output Enable function.
  • Preliminary PLL601-15 Low Phase Noise PLL Clock Multiplier PIN.

PLL601-15 Distributor