PhaseLink PLL650-02
The PLL650-02 provides selectable spread spectrum modulation and selectable output frequencies. These pins allow 3 levels for input selection: namely, 0 (Connect to GND), 1 (Connect to VDD), M (Do not connect). In order to reduce pin usage, the PLL650-02 uses tri-level input pins.FEATURES
e h● Full CMOS output swing with 40-mA output drive S output capability. 25-mA drive at TTL level. a t
● Advanced, low power, sub-micron CMOS processes. a
● 25MHz .D fundamental crystal or clock input.
● 4 outputs at 50MHz, 2 outputs selectable at 25MHz or w 125MHz, 1 output selectable at 25MHz or 100MHz. w SDRAM selectable frequencies of 66.6, 75, 83.3, w● 2 100MHz (Double Drive Strength).
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● PLL650-02 Low EMI Network LAN Clock PIN CONFIGURATION VDD XIN XOUT/50MHz_OE*^ GND VDD 1 2 3 4 5 6 7 8 9 24 23 22 21 20 19 18 17 16 15 14 13 VDD VDD 25MHz/100MHz GND SDRAMx2 GND All non SDRAM outputs can be disabled (tri-state) Spread spectrum technology selectable for EMI reduction from ±0.5%, ±0.75% for SDRAM and 100MHz output. Zero PPM synthesis error in all clocks. Ideal for Network switches. 3.3V operation. Available in 24-Pin 150mil SSOP. DESCRIPTIONS The PLL 650-02 is a low cost, low jitter, and high performance clock synthesizer. With PhaseLink’s proprietary analog Phase...