PLL650-03 Overview
25MHz fundamental crystal input (20pF C L parallel resonant). C L have been integrated into the chip. No external C L capacitor is required.
PLL650-03 Key Features
- Full CMOS output swing with 40-mA output drive S output capability. 25-mA drive at TTL level. a t
- Advanced, low power, sub-micron CMOS processes. a
- 25MHz .D fundamental crystal or clock input
- 4 outputs fixed at 50MHz with output disable, 1 output w selectable at 25MHz or 100MHz with output disable w
- SDRAM selectable frequencies of 66.6, 75, 83.3, 100MHz w (Double Drive Strength)
- PLL650-03