PLL650-05 Overview
Description
The PLL 650-05 is a low cost, low jitter, and high performance clock synthesizer. With PhaseLinkâs proprietary analog Phase Locked Loop techniques, the chip accepts 25.0 MHz crystal, and produces multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs.
Key Features
- w w - - - - - w - Full CMOS output swing with 40-mA output drive capability
- 25-mA output drive at TTL level
- Advanced, low power, sub-micron CMOS processes
- 25MHz fundamental crystal or clock input
- 3 fixed outputs of 25MHz, 75Mhz and 125Mhz with output disable SDRAM selectable frequencies of 105, 83.3, 140MHz (Double Drive Strength)
