PLL650-06 Overview
Description
The PLL 650-06 is a low cost, low jitter, and high performance clock synthesizer. With PhaseLinkâs proprietary analog Phase Locked Loop techniques, the chip accepts 25.0 MHz crystal, and produces one 50MHz output clock and one selectable 75MHz or 66.6MHz output clock, making the chip ideal for networking applications.
Key Features
- w - w w Full CMOS output swing with 40-mA output drive capability
- 25-mA output drive at TTL level
- Advanced, low power, sub-micron CMOS processes
- 25MHz fundamental crystal or clock input
- One output fixed at 50MHz One selectable frequency output of 66.6 or 75MHz (with Double Drive Strength output)
