Datasheet4U Logo Datasheet4U.com

PLL650-08 - Network LAN Clock Source

General Description

The PLL 650-08 is a low cost, low jitter, and high performance clock synthesizer.

With PhaseLink’s proprietary analog Phase Locked Loop techniques, the chip accepts 25MHz crystal, and produces multiple output clocks for networking chips, and ASICs.

t a .

Key Features

  • w w Full CMOS output swing with 40-mA output drive capability. 25-mA output drive at TTL level. Advanced, low power, sub-micron CMOS processes. 25MHz fundamental crystal or clock input. 1 output fixed at 100MHz , 1 output fixed at 125MHz . Zero PPM synthesis error in all clocks. Ideal for Network switches. 3.3V operation. Available in 8-Pin 150mil SOIC. at . D w h S a t e e 4U m o . c.

📥 Download Datasheet

Datasheet Details

Part number PLL650-08
Manufacturer PhaseLink
File Size 339.01 KB
Description Network LAN Clock Source
Datasheet download datasheet PLL650-08 Datasheet

Other Datasheets by PhaseLink

Part Number Description
PLL650-02 Low EMI Network LAN Clock
PLL650-03 Low EMI Network LAN Clock
PLL650-04 Low EMI Clock
PLL650-05 Low EMI Network LAN Clock
PLL650-06 Network LAN Clock
PLL650-07 Low COST Network LAN Clock SOURCE
PLL650-09 Low Cost Network LAN Clock
PLL650-10 Network LAN Clock
PLL600-10 (PLL600-10/20/30) Ultra Low Current XO
PLL600-17 (PLL600-17/27/37) Ultra Low Current XO

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FEATURES • • • • • • • • w w Full CMOS output swing with 40-mA output drive capability. 25-mA output drive at TTL level. Advanced, low power, sub-micron CMOS processes. 25MHz fundamental crystal or clock input. 1 output fixed at 100MHz , 1 output fixed at 125MHz . Zero PPM synthesis error in all clocks. Ideal for Network switches. 3.3V operation. Available in 8-Pin 150mil SOIC. at .D w h S a t e e 4U m o .c PRELIMINARY PLL650-08 Network LAN Clock Source PIN CONFIGURATION XIN XOUT GND VDD 1 2 3 4 8 7 6 5 VDD 100MHz GND 125MHz PLL 650-08 DESCRIPTIONS The PLL 650-08 is a low cost, low jitter, and high performance clock synthesizer.