Datasheet4U Logo Datasheet4U.com

74ALVC04 - Hex inverter

General Description

The 74ALVC04 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times.

The 74ALVC04 provides six inverting buffers.

Key Features

  • Wide supply voltage range form 1.65 to 3.6 V.
  • 3.6 V tolerant inputs/outputs.
  • CMOS low power consumption.
  • Direct interface with TTL levels (2.7 to 3.6 V).
  • Power-down mode.
  • Latch-up performance exceeds 250 mA.
  • Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V).
  • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V.

📥 Download Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
INTEGRATED CIRCUITS DATA SHEET 74ALVC04 Hex inverter Product specification Supersedes data of 2003 Feb 04 2003 May 14 Philips Semiconductors Hex inverter Product specification 74ALVC04 FEATURES • Wide supply voltage range form 1.65 to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power consumption • Direct interface with TTL levels (2.7 to 3.6 V) • Power-down mode • Latch-up performance exceeds 250 mA • Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V). • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. DESCRIPTION The 74ALVC04 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.