Philips 74F08
Quad two-input AND gate
DESCRIPTION
14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5.0V ±10%, Tamb = 0°C to +70°C N74F08N N74F08D INDUSTRIAL RANGE VCC = 5.0V ±10%, Tamb = –40°C to +85°C I74F08N I74F08D PKG DWG # SOT27-1 SOT108-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS Dna, Dnb Qn Data inputs Data outputDESCRIPTION
74F (U.L.) HIGH/LOW 1.0/1.0 50/33 LOAD VALUE HIGH/LOW 20µA/0.6mA 1.0mA/20mA NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC DIAGRAM D0a D0b D1a D1b D2a D2b VCC = Pin 14 GND = Pin 7 D3a D3b 1 2 4 5 9 10 12 13 11 3 Q0 FUNCTION TABLE INPUTS Dna L L 8 Q2 OUTPUT Dnb L H L Qn L L L H 6 Q1 H Q3 SF00052 H H NOTES: H = High voltage level L = Low voltage level LOGIC SYMBOL 1 2 4 5 9 10 12 13 LOGIC SYMBOL (IEEE/IEC) 1 2 & 3 D0a D0bD1a D1b D2a D2b D3a D3b 4 6 5 Q0 Q1 Q2 Q3 9 8 10 VCC = Pin 14 GND = Pin 7 3 6 8 11 SF00040 12 11 13 SF00053 1995 Apr 19 2 853–0328 15145 Philips Semiconductors Product specification Quad 2-input AND gate 74F08ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.