Philips 74F195A
The 74F195A is a 4-Bit Parallel Access Shift Register and its functional characteristics are indicated in the Logic Diagram and Function Table. This device is useful in a variety of shifting, counting and storage applications. It performs serial, parallel, serial to parallel, or parallel to serial data transfers at very high speeds.FEATURES
● Shift right and parallel load capability● J – K (D) inputs to first stage
● Complement output from last stage
● Asynchronous Master Reset
● Diode inputs
DESCRIPTION
The 74F195A operates in two primary modes: shift right (Q0→Q1) and parallel load, which are controlled by the state of the Parallel Enable (PE) input. Serial data enters the first flip-flop (Q0) via the J and K inputs when the PE input is High, and is shifted one bit in the direction Q0→Q1→Q2→Q3 following each Low-to-High clock transition. The J and K inputs provide the flexibility of the J-K type input for special applications, and by tying the two together the simple D-type input is made for general applications. The device appears as four common clocked D flip-flops when the PE input is Low. After the Low-to-High clock transition, data on the parallel inputs (D0–D3) is transferred to the respective Q0–Q3 outputs. Shift left operation (Q3–Q2) can be achieved by tying the Qn outputs to the Dn-1 inputs and holding the PE input Low.