74F257A Datasheet | Philips Semiconductors

FEATURES - Industrial range available (- 40°C to +85°C) - Multifunction capability - Non-inverting data path - 3-State outputs - See 74F258A for inverting version DESCRIPTION The 74F257A has four identical 2-input multiplexers with 3-State outputs which select 4 bits of data from two sources uncer control of a mon Select (S) input. The I0a inputs are selected when the mon Select input is Low and the I1n inputs are selected when the mon Select input is High. Data appears at the outputs in true non-inverted form from the selected inputs. The 74F257A is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the mon Slect input. Outputs are forced to a high impedance “off” state when the Output Enable (OE) is High. All but one device must be in high impedance state to avoid currents that would exceed the maximum rating if the outputs were tied together. Design of the Output Enable signals must ensure that there is no overlap when outputs of 3-state devices were tied together. PIN CONFIGURATION S I0a I1a Ya I0b I1b Yb GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC OE I0d I1d Yd I0c I1c Yc SF00673 TYPE 74F257A TYPICAL PROPAGATION DELAY 4.3ns TYPICAL SUPPLY CURRENT (TOTAL) 12m A ORDERING INFORMATION ORDER CODE DESCRIPTION 16-pin plastic DIP 16-pin plastic SO MERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F257AN N74F257AD INDUSTRIAL RANGE VCC = 5V ±10%, Tamb = - 40°C to +85°C I74F257AN I74F257AD DRAWING NUMBER SOT38-4 SOT109-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS I0n, I1n S OE Ya - Yd DESCRIPTION Data inputs mon Select input Output Enable input (active Low) Data outputs 74F (U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 150/33 LOAD VALUE HIGH/LOW 20µA/0.6m A 20µA/0.6m A 20µA/0.6m A 3.0m A/20m A NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6m A in the Low state. LOGIC SYMBOL 2 3 5 6 11 10 14 13 LOGIC SYMBOL (IEEE/IEC) 15 1 EN G1 2 I0a I1a I0b 1 15 S OE...