Philips 74F27
Triple 3-input NOR gate
DESCRIPTION
14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F27N N74F27D INDUSTRIAL RANGE VCC = 5V ±10%, Tamb = –40°C to +85°C I74F27N I74F27D PKG DWG # SOT27-1 SOT108-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS Dna, Dnb, Dnc Qn Data inputs Data outputDESCRIPTION
74F (U.L.) HIGH/LOW 1.0/1.0 50/33 LOAD VALUE HIGH/LOW 20µA/0.6mA 1.0mA/20mA NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state. LOGIC DIAGRAM FUNCTION TABLE 1 D0a 2 D0b 13 D0c D1a D1b D1c D2a D2b VCC = Pin 14 GND = Pin 7 D2c 3 4 5 9 10 11 8 Q2 6 Q1 12 Q0 INPUTS Dna L X X H NOTES: H = High voltage level L = Low voltage level Dnb L X H X Dnc L H X X OUTPUT Qn H L L L SF00034 February 5, 1991 2 853 0049 01638 Philips Semiconductors Product specification Triple 3-input NOR gate 74F27 LOGIC SYMBOL IEC/IEEE SYMBOL 1 w1 12 1 2 13 3 4 5 9 10 11 2 13 D0a D0b D0c D1a D1b D1c D2a D2b D2c 3 4 6 Q0 Q1 Q2 5 9 10 8 12 VCC = Pin 14 GND = Pin 7 6 8 11 SF00035 SF00036ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.