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74F299 Datasheet PDF

Philips 74F299

The 74F299 is an 8-bit universal shift/storage register with 3-State outputs. The parallel load inputs and flip-flop outputs are multiplexed to reduce the total number of package pins. The 74F299 contains eight edge-triggered D-type flip-flops and the interstage logic necessary to perform synchronous shift left, shift right, parallel load and hold operations.
Part No. 74F299
Datasheet 74F299 Download
Manufacturer
Philips
Description 8-bit universal shift/storage register
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74F299 datasheet page 1 preview

FEATURES

● Common parallel I/O for reduced pin count
● Additional serial inputs and outputs for expansion
● Four operating modes: Shift left, shift right, load and store
● 3-State outputs for bus-oriented applications

DESCRIPTION

Four modes of operation are possible: Hold (store), shift left, shift right and parallel load. Additional outputs are provided for flip-flops Q0 and Q7 to allow easy serial cascading. A separate active-Low Master Reset is used to reset the register. The type of operation is determined by S0 and S1, as shown in the Function Table. All flip-flop outputs are brought out through 3-State buffers to separate I/O pins that also serve as data inputs in the parallel load mode. Q0 and Q7 are also brought out on other pins for expansion in serial shifting of longer words. A Low signal on MR overrides the Select and CP inputs and resets the flip-flops. All other state changes are initiated by the rising edge of the clock. Inputs can change when the clock is in either state provided only that the recommended setup and hold times, relative to the rising edge of clock are observed.
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