Philips 74F30
8-input NAND gate
DESCRIPTION
14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F30N N74F30D PKG DWG # SOT27-1 Dd De Df GND SF00070 SOT108-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS Dn Q Data inputs Data outputDESCRIPTION
74F (U.L.) HIGH/LOW 1.0/1.0 50/33 LOAD VALUE HIGH/LOW 20µA/0.6mA 1.0mA/20mA NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC DIAGRAM Da Db Dc Dd De Df Dg VCC = Pin 14 GND = Pin 7 Dh 1 FUNCTION TABLE INPUTS Dna 2 OUTPUT Dnf X X X X X L X X H Dng X X X X X X L X H Dnh X X X X X X X L H Qn H H H H H H H H L Dnb X L X X X X X X Dnc X X L X X X X X Dnd X X X L X X X X Dne X X X X L X X X H L 3 4 8 5 6 11 12 Q X X X X X X X SF00071 H H H H NOTES: 1. H = High voltage level 2. L = Low voltage level 3. X = Don’t care LOGIC SYMBOL IEC/IEEE SYMBOL 1 & 1 2 3 4 5 6 11 12 2 3 Da Db Dc Dd De Df Dg Dh 4 8 5 Q 6 11 8 VCC = Pin 14 GND = Pin 7 12 SF00072 SF00073 March 3, 1989 2 853–0050 95941 Philips S...