74F552 Overview
The 74F522 Octal Registered Transceiver contains two 8-bit registers for temporary storage of data flowing in either direction. Each register has its own clock (CPR, CPS) and Clock Enable (CER, CES) inputs, as well as a flag flip-flop that is set automatically as the register is loaded. The flag output will be reset when the Output Enable returns to High after reading the output port.
74F552 Key Features
- 8-bit bidirectional I/O port with handshake
- Register status flag flip-flops
- Separate clock enable and output enable
- Parity generation and parity check
- B outputs and parity output sink 64mA
