74F725A Description
The 74F723A/74F723-1 consist of four 3-to-1 multiplexers designed for address multiplexing of dynamic RAMs and other multiplexing applications. Select (S0, S1) inputs control which line is to be selected, as defined in the Function Table for 74F723A/74F723-1. When the invering input (INV) is Low, the input data path is inverted.
74F725A Key Features
- Consists of four 3-to-1 Multiplexers
- High impedance PNP base inputs for reduced loading
- Inverting or non-inverting data path capability by an inverting (INV)
- Designed for address multiplexing of dynamic RAM and other
74F725A Applications
- Multiple side pins for VCC and GND to reduce lead inductance