74HC1G125 Datasheet | Philips Semiconductors

FEATURES - Wide operating voltage: 2.0 to 6.0 V - Symmetrical output impedance - High noise immunity - Low power dissipation - Balanced propagation delays - Very small 5 pins package - Output capability: bus driver. Notes DESCRIPTION The 74HC1G/HCT1G125 is a high-speed Si-gate CMOS device. The 74HC1G/HCT1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output as assume a high-impedance OFF-state. The bus driver output currents are equal pared to the 74HC/HCT125. FUNCTION TABLE See note 1. INPUTS OE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF state. in A L H X OUTPUT out Y L H Z 74HC1G125; 74HCT1G125 QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns. TYP. SYMBOL t PHL/t PLH CI CPD PARAMETER propagation delay in A to out Y input capacitance power dissipation capacitance notes 1 and 2 CONDITIONS HC1G CL = 15 p F; VCC = 5 V 9 1.5 30 HCT1G 10 1.5 27 ns p F p F UNIT 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in p F; VCC = supply voltage in V; ∑ (CL × VCC2 × fo) = sum of outputs. 2. For HC1G the condition is VI = GND to VCC. For HCT1G the condition is VI = GND to VCC - 1.5 V. PINNING PIN 1 2 3 4 5 OE in A GND out Y VCC SYMBOL DESCRIPTION output enable input data input ground (0 V) data output DC supply voltage 1998 Nov 10 Philips Semiconductors Product specification Bus buffer/line driver; 3-state ORDERING INFORMATION 74HC1G125; 74HCT1G125 PACKAGES OUTSIDE NORTH AMERICA 74HC1G125GW 74HCT1G125GW TEMPERATURE RANGE - 40 to +125 °C PINS 5 5 PACKAGE SC-88A SC-88A MATERIAL plastic plastic CODE SOT353 SOT353 MARKING HM TM handbook, halfpage handbook, halfpage OE 1 in A 2 GND 3 MNA117 5 VCC 2 in A out Y 4 out Y MNA118 Fig.1...