74HC1GU04 Datasheet | Philips Semiconductors

FEATURES - Wide operating voltage: 2.0 to 6.0 V - Symmetrical output impedance - Low power dissipation - Balanced propagation delays - Very small 5-pin package - Output capability: standard. DESCRIPTION The 74HC1GU04 is a high-speed Si-gate CMOS device. The 74HC1GU04 provides the inverting single stage function. The standard output currents are 1⁄2 pared to the 74HCU04. FUNCTION TABLE See note 1. INPUT in A L H Note 1. H = HIGH voltage level; L = LOW voltage level. OUTPUT out Y H L Notes QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6.0 ns. SYMBOL t PHL/t PLH CI CPD PARAMETER propagation delay in A to out Y input capacitance power dissipation capacitance notes 1 and 2 CONDITIONS CL = 15 p F; VCC = 5 V TYP. 5 5 14 UNIT ns p F p F 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in p F; VCC = supply voltage in V; ∑ (CL × VCC2 × fo) = sum of outputs. 2. For HC1G the condition is VI = GND to VCC. PINNING PIN 1 2 3 4 5 n.c. in A GND out Y VCC SYMBOL DESCRIPTION not connected data input ground (0 V) data output DC supply voltage 1998 Nov 18 Philips Semiconductors Product specification Inverter ORDERING INFORMATION PACKAGES OUTSIDE NORTH AMERICA 74HC1GU04GW TEMPERATURE RANGE - 40 to +125 °C PINS 5 PACKAGE SC-88A MATERIAL plastic CODE SOT353 MARKING HD handbook, halfpage n.c. 1 in A 2 GND 3 MNA042 5 VCC U04 4 out Y handbook, halfpage 2 in A out Y MNA043 Fig.1 Pin configuration. Fig.2 Logic symbol. handbook, halfpage MNA044 4 handbook, halfpage in A out Y MNA045 Fig.3 IEC logic symbol. Fig.4 Logic diagram. 1998 Nov 18 Philips Semiconductors Product...